gib65 Posted July 4, 2008 Posted July 4, 2008 Can anyone tell me if this is right? It's based on what little I remember from the course I took in digital design. A ROM chip starts out with all its input and output lines interconnected like a grid (see figure 3a)' date=' so that a signal entering on any input line can find its way, like a car through a grid of streets, to any output line (and, in fact, it would find its way to all output lines as that is the nature of electric currents). As it stands, this is somewhat of a useless circuit. It would be more useful if it could actually compute something meaningful, some specific output pattern given a specific input pattern. The way computer engineers do this is by building these ROM circuits with fuses at each intersection. Through a complex procedure by which it is determined which intersections should block incoming signals and which should allow them to pass (depending on what you want the ROM chip to compute), certain fuses are selected and blown while others are left alone. They blow the selected fuses - literally exploding the intersections - making it impossible for any signal to pass through that intersection. It would be like a car approaching an intersection and finding a giant hole there. This results in only certain pathways down which the signal can travel, and thus only certain output lines at which the signal can arrive. For example, in figure 3b, you can see that an input signal on line 3 results in output signals on lines 4, 7, and 9. Put in binary notation, we would say that the input 0010000000 (where the 0's mark no input signals and the 1 marks an input signal) results in the output 0001001010 - or that the ROM chip computes 0001001010. You can also see, by manually tracing it out, that an input of 1010001110 results in 011001010, and that an input of 0101000100 results in 0111000000. By blowing a different set of fuses, the ROM chip would compute a different set of output for these input.[/quote'] figure 3a................................................................figure 3b
Adrian Posted July 8, 2008 Posted July 8, 2008 That is correct. Look up PROM Digital Design and you can get a better understanding what is going on under the hood. You can use logicworks to simulate circuits. Its fun messing with PLD's ...but deriving the minimal SOP/POS equations can be a PITA sometimes. http://www.google.com/url?sa=t&ct=res&cd=1&url=http%3A%2F%2Fwww.ece.umd.edu%2F~ppetrov%2FENEE244_FA06%2FPLDs.ppt&ei=aXtzSKfbH42mevjH2dEC&usg=AFQjCNEwMF7rhxJ67RfZgavebRpebeC6uQ&sig2=oqUT4s82TJbr1mlCy3Ouig
CelticMadSci Posted July 15, 2008 Posted July 15, 2008 Plus you'll have some AND/OR type logic circuits around the periphery. What you describe is a PLD, but ROM could also be FPGA's, a circuit of smaller ICs, or for high-end stuff, custom-made.
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