Construction of a logic gate

[mr_l]

Hello I am new to this forum although I have used this site for some time.

I got stuck with the following task and need some help.

I have to draw a transistor diagram of a CMOS gate with the following logical

function

 

F (a, b​​, c) = (a * b + a * c + b * c) '

 

The gate must be made up of only One pull-up and a pull-down network. It should be connected in the same step not be linked to several steps with AND, OR and NOT gates one after another.

 

I am not asking anyone to solve my task i just need some help.

I have read and been understanding how CMOS gates working

but I was a little difficulty to construct the gate. Is it any particular method for constructing logic gates???

Here is the truth table of logical funkction.

[khaled]

 

This the diagram, it's a simple one actually ...

 

You simply start from the highest-priority in the function .. BEDMAS = Brackets, Exponents (NOT), Division, Multiplication (AND), Addition (OR), Subtraction

~ Brackets, NOT, NAND, AND, XOR, NOR, OR ...

[mr_l]

It was of great help. I have solved the task. Thanks a lot