Instruction Set Architecture

[andWindsor15]

Hi everyone,

Can anyone help me to answer the question below? I would really appreciate it if you could help me. I have been searching for a solution for this question in books but could not find a proper explanation of how these things work.

A processor has 24 registers, uses 8-bit immediates, and has 36 different instructions
(corresponding to 36 operation codes) in its instruction set. These 36
instructions are classified into 4 types as listed below:

Type-A: takes 2 source registers, uses 1
destination register;

Type-B: takes 1 source register, uses 1
destination register;

Type-C: takes 1 source register, 1 immediate,
uses 1 destination register;

Type-D: takes 1 immediate, uses 1 destination
register.

Assume that the Instruction Set Architecture requires that all instructions be a multiple of 8 bits (1 byte) in
length, and the operation codes (opcodes) are of fixed length.

a)
How many bytes do we need to use to
encode the Type-A instruction?

b)
How many bytes do we need to use to
encode the Type-C instruction?

Edited February 19, 2013 by andWindsor15

[LaurieAG]

Basically it would be opcode length + address length + register contents length for both.

 

http://en.wikipedia.org/wiki/Assembly_language

 

 

MOV AL, 61h ; Load AL with 97 decimal (61 hex)