Quick help with MOSFETS, where do the electrons come from?

[CasualKilla]

I have an electronics test tomorrow, and I got most the the theory down, but if we quickly consider a N type mosfet with a positive Vgs is applied, the positive holes in the P-type channel are repelled, thus the area becomes negatively charged (or is it more accurate to say electrons are attracted to the area??), but this does not necessarily mean there are free electrons to carry the current does it? Where do the charge carriers come from? I watch a youtube video that says electrons are attracted to the region, which doesn't make sense after the channel has been negatively charged, since it will repel electrons.

 

Thanks in advance!

[studiot]

Well first remember that the channel is a length of unobstructed resistive semiconductor material.

 

So current will flow through it if it is connected into a circuit.

 

The channel also forms one plate of a capacitor, the gate of the MOSFET forming the other.

 

So if the gate is connected to a voltage (relative to the source) ie has a charge placed on it then that charge will induce an opposite charge onto the channel.

 

This opposite charge will add to or detract from the current already flowing.

 

But this only occurs if the MOSFET is connected into a suitable circuit.

It does not happen if the source and drain are not connected into a circuit, as with any other capacitor.

 

So the simple answer to your question is that the electrons or holes come from the rest of the circuit that the source and drain are connected into.

 

Remember also that the channel can be N type or P type, enhancement or depletion (less common) and that some FETS require a voltage to stop drain source current flowing.

Go well in your test.

Edited March 30, 2015 by studiot

[CasualKilla]

Well first remember that the channel is a length of unobstructed resistive semiconductor material.

 

So current will flow through it if it is connected into a circuit.

 

The channel also forms one plate of a capacitor, the gate of the MOSFET forming the other.

 

So if the gate is connected to a voltage (relative to the source) ie has a charge placed on it then that charge will induce an opposite charge onto the channel.

 

This opposite charge will add to or detract from the current already flowing.

 

But this only occurs if the MOSFET is connected into a suitable circuit.

It does not happen if the source and drain are not connected into a circuit, as with any other capacitor.

 

So the simple answer to your question is that the electrons or holes come from the rest of the circuit that the source and drain are connected into.

 

Remember also that the channel can be N type or P type, enhancement or depletion (less common) and that some FETS require a voltage to stop drain source current flowing.

Go well in your test.

I understand the mechanism that charges the p-type substrate, and also that a Vds is needed to create a current, but I get confused, because it seems the electrons must flow through a negatively charged p-type substrate, how to we go from a majority carrier of holes to a majority carrier electrons?

 

I visualize the holes being repeled away from the side closest to the gate, creating a negative charge, but I don't know how this charge translates to an increase of majority carrier electrons.

 

Or is the purpose of the gate voltage to simply kill the depletion region and still use holes as the majority carrier for the current?

Edited March 30, 2015 by CasualKilla

[CasualKilla]

After sleeping on it, i came to the following conclusion, so I am going to yolo it.

 

N-type enhancement mode NMOS

 

I am gonna go with this: As Vgs increases the holes in the p-type region will decrease, creating a negative channel in the p-type materiel. This will only happen up till a point where there are no more "free" positive charges. After this point, to make the channel more negative (to match the positive gate voltage on other plate) electrons will need to be pulled from the surrounding materials, most likely the N-type drain and source. This will turn the p-type majority carrier hole materiel into an effective n-type majority carrier electron materiel. The more electrons are pulled into this region, the better conductivity the channel will have, and the more current will be allowed to flow from drain to source.

[studiot]

Remember that the drain, source and channel are formed from a P type substrate to create an N type region and vice versa.

 

That is the channel and substrate are not the same element of the final MOSFET.

[Enthalpy]

N-type enhancement mode NMOS

 

I am gonna go with this: As Vgs increases the holes in the p-type region will decrease, creating a negative channel in the p-type materiel. This will only happen up till a point where there are no more "free" positive charges. After this point, to make the channel more negative (to match the positive gate voltage on other plate) electrons will need to be pulled from the surrounding materials, most likely the N-type drain and source. This will turn the p-type majority carrier hole materiel into an effective n-type majority carrier electron materiel. The more electrons are pulled into this region, the better conductivity the channel will have, and the more current will be allowed to flow from drain to source.

 

Yes, that's it.

 

So much, that there is a "depleted zone" between the depth, where wholes exist due to the P type dopant, and the channel, where the gate has attracted electrons if its voltage suffices for it.

 

Because of the energy gap between the valence electrons and the conduction electrons, holes are repelled, and then if the voltage suffices, electrons are attracted. In between, if the gate voltage doesn't suffice, the depleted zone extends from the gate, and no channel forms.

 

Present processors get 0.8V supply for their core, less than one silicon bandgap... Which implies that the doping, gate material etc chosen to create an electron channel at 0.8V Vgs do not let the holes approach at 0V Vgs. Such transistors have a depleted zone under the gate even at 0V Vgs, and the "1" level only finishes the job by attracting electrons. And it's the same for P-type mosfets, which isn't obvious to obtain simultaneously and has consequences on the production process.

 

The attracted electrons are not all mobile. Some get trapped at the semiconductor-insulator interface, where many positions exist at varied energy levels. These electrons can be less mobile, or not mobile, or need a kick by heat energy to be released and move, in which case they participate in the current sometimes. This is the basic cause of the 1/F noise in Mosfets.

 

Because the mobility in a Mosfet is seriously worse (/3) than in plain material due to the interface with the insulator, better components are made for high frequencies (=Hemt "high electron mobility"), where a thin heteroepitaxy under the gate repels the electrons from the bad interface with the insulator (Mosfet) or the gate (Mesfet). The current flows more easily a bit deeper, near the heteroepitaxy which can be clean, and the thin layer still permits the control by the gate.

[studiot]

More help here

 

http://forum.allaboutcircuits.com/threads/clarify-semiconductor-posts.101255/#post-764638

[CasualKilla]

 

Yes, that's it.

 

So much, that there is a "depleted zone" between the depth, where wholes exist due to the P type dopant, and the channel, where the gate has attracted electrons if its voltage suffices for it.

 

Because of the energy gap between the valence electrons and the conduction electrons, holes are repelled, and then if the voltage suffices, electrons are attracted. In between, if the gate voltage doesn't suffice, the depleted zone extends from the gate, and no channel forms.

 

Present processors get 0.8V supply for their core, less than one silicon bandgap... Which implies that the doping, gate material etc chosen to create an electron channel at 0.8V Vgs do not let the holes approach at 0V Vgs. Such transistors have a depleted zone under the gate even at 0V Vgs, and the "1" level only finishes the job by attracting electrons. And it's the same for P-type mosfets, which isn't obvious to obtain simultaneously and has consequences on the production process.

 

The attracted electrons are not all mobile. Some get trapped at the semiconductor-insulator interface, where many positions exist at varied energy levels. These electrons can be less mobile, or not mobile, or need a kick by heat energy to be released and move, in which case they participate in the current sometimes. This is the basic cause of the 1/F noise in Mosfets.

 

Because the mobility in a Mosfet is seriously worse (/3) than in plain material due to the interface with the insulator, better components are made for high frequencies (=Hemt "high electron mobility"), where a thin heteroepitaxy under the gate repels the electrons from the bad interface with the insulator (Mosfet) or the gate (Mesfet). The current flows more easily a bit deeper, near the heteroepitaxy which can be clean, and the thin layer still permits the control by the gate.

I actually ended up having this exact question in my test, so good thing we discussed it "Explain the NMOS operation with use of diagrams. Draw the MOSFET in saturation region, and explain it's operation." (not exact wording).

 

We are starting frequency response of mosfets next semester, so I assume we will cover much of that stuff then. It is sometimes disappointing since we don't cover the physics in much detail and often end up with little fundamental understanding, but rather the ability to find the gains, currents, voltages etc of a 4 transistor circuits, (big woop since spice does it in 2s) as with BJTs last year.

 

Edit: I see your point about the Vgs already being setup to skip the whole repelling holes step and start straight with electron attraction. I guess this corresponds to Vtn=0 or near 0.

Edited April 1, 2015 by CasualKilla

[Enthalpy]

How much detailed understanding does one need to build further? Eternal question... Knowing as much as possible is a key to good designs and to creativity, but at some point we must make choices. And just like chemistry may be the basis of cooking, it doesn't suffice for cooking, is a somewhat remote basis, so most specialists don't combine both - and so do electrical engineers, some design components and others assemble them.

 

The present situation is that

- Circuit designers usually have a very limited understanding of how the components work

- Components designers know little about circuitry and don't understand all the physics behind. Most don't understand the negative mass in the valence band for instance.

- Quantum physicists usually don't know the components nor the circuits.

 

If we have to set a fronteer somewhere, putting it between the components and the circuits isn't bad, because these are different knowledges, different practices (engineering versus more science), different backgrounds...

 

----------

 

Spice: I don't use it. I learned it when I was a microelectronics guy, but never used it for boards, because

- I'm faster on a pocket calculator than to enter a circuit on Spice

- Spice tells (...with much luck!) how a design behaves, but I make designs for a desired behaviour instead

- An electronic circuit can be fully computed. EE are lucky people. Software is sometimes justfied for air flows or mechanical designs where partial differential equations prevent exact solutions.

- The designer must check worst cases of component spreads and drifts. Circuits use to contain too few components to make a statistical analysis meaningful - but Spice makes a Monte Carlo usually, taking too few cases and needing far too much time.

- Fundamentally, a simulation tells how the design should have behaved, which is the trivial part of the job. Serious questions begin with everything that may plague the design, all the unwanted interactions. Spice will thell their effect only if you think at them (stray capacitance, self and mutual inductances, track resistance, external fields) and model them by yourself. Though, the hard part is to guess what the interactions will be and evaluate their magnitude; once you know how big a mutual inductance, which isn't obvious, Spice only tells its effect, which is trivial. No help at all.

 

My observation is that people who use Spice regularly make bad designs, and that schools and universities tend to over-use simulations for lack of laboratories (...not only in electronics). So my very strong recommendation would be: do not rely on Spice, don't trust it neither, ask to access the labs, invest muuuuuuch time in it. This time is not compressible, it is vital, and is the only way to become a decent engineer.

 

Beyond the course, read an amateur review, especially Elektor.

[studiot]

 

enthalpy

Most don't understand the negative mass in the valence band for instance.

 

Negative effective mass.

This is not quite the same as ordinary mass.

[CasualKilla]

How much detailed understanding does one need to build further? Eternal question... Knowing as much as possible is a key to good designs and to creativity, but at some point we must make choices. And just like chemistry may be the basis of cooking, it doesn't suffice for cooking, is a somewhat remote basis, so most specialists don't combine both - and so do electrical engineers, some design components and others assemble them.

 

The present situation is that

- Circuit designers usually have a very limited understanding of how the components work

- Components designers know little about circuitry and don't understand all the physics behind. Most don't understand the negative mass in the valence band for instance.

- Quantum physicists usually don't know the components nor the circuits.

 

If we have to set a fronteer somewhere, putting it between the components and the circuits isn't bad, because these are different knowledges, different practices (engineering versus more science), different backgrounds...

 

----------

 

Spice: I don't use it. I learned it when I was a microelectronics guy, but never used it for boards, because

- I'm faster on a pocket calculator than to enter a circuit on Spice

- Spice tells (...with much luck!) how a design behaves, but I make designs for a desired behaviour instead

- An electronic circuit can be fully computed. EE are lucky people. Software is sometimes justfied for air flows or mechanical designs where partial differential equations prevent exact solutions.

- The designer must check worst cases of component spreads and drifts. Circuits use to contain too few components to make a statistical analysis meaningful - but Spice makes a Monte Carlo usually, taking too few cases and needing far too much time.

- Fundamentally, a simulation tells how the design should have behaved, which is the trivial part of the job. Serious questions begin with everything that may plague the design, all the unwanted interactions. Spice will thell their effect only if you think at them (stray capacitance, self and mutual inductances, track resistance, external fields) and model them by yourself. Though, the hard part is to guess what the interactions will be and evaluate their magnitude; once you know how big a mutual inductance, which isn't obvious, Spice only tells its effect, which is trivial. No help at all.

 

My observation is that people who use Spice regularly make bad designs, and that schools and universities tend to over-use simulations for lack of laboratories (...not only in electronics). So my very strong recommendation would be: do not rely on Spice, don't trust it neither, ask to access the labs, invest muuuuuuch time in it. This time is not compressible, it is vital, and is the only way to become a decent engineer.

 

Beyond the course, read an amateur review, especially Elektor.

Good advice friend.

 

We do get given design problems, so it is not as bad as just asking us to solve given circuits, but still feels lacking sometimes.

 

Perhaps the most annoying thing though, is that the physics is often so simplified that it becomes confusing and misleading, especially if you are the type of person who likes to use new understanding to make predictions.

 

This has never been more true than when I starting studying electro-magnetism. The simplified explanations I looked at gave me incorrect intuitions leading to bad predictions. It was only after I started working through the fundamental maxwell equations that things started coming together, and even then, I made false predictions until I examined the conditions under which the equations were derived. I also think field lines are a terrible substitute for a vector field, only after a the vector field is understood, are the field lines even useful.

 

The process was restarted when I looked into special relativity, luckily this time I got straight into the implementation of the equations, which provided better intuition about relativistic effects than some someone like Micho could have given in a 3 hour talk.

 

Simplification is very dangerous when trying to make predictions, it only seems useful as an attempt at peice of mind for the ignorant.

[studiot]

 

I also think field lines are a terrible substitute for a vector field, only after a the vector field is understood, are the field lines even useful.

 

Be aware that mathematicians have a much more general definition of the word 'Field' than physicists.

 

For instance in maths the real numbers form a field, but in physics they would be called scalars or zero order tensors.

[Enthalpy]

Negative effective mass.

This is not quite the same as ordinary mass.

 

Then do tell me what are all the effects of the mass, and how you distinguish the ("ineffective"?) mass from the so-called "effective" one?

[studiot]

 

Then do tell me what are all the effects of the mass, and how you distinguish the ("ineffective"?) mass from the so-called "effective" one?

 

Are you having sport with me suh?

[Enthalpy]

Absolutely nothing against you, of course and obviously. But very much against the expression "effective" mass.

 

In the case of the mass, because it defines the acceleration - and also the creation of gravitation fields and their effects on an object, which mainstream theory tells are all three the same. And that's all, isn't it? So if an electron or a zlimmer shows a proportionality factor between the acceleration and the force, I dont' see how on Earth we could not call it "mass".

 

It looks like a mental hindrance by people who observe a mass in solids that differs from the mass in vacuum, make the computational effort to obtain the expected result, but would like to keep the vacuum mass as the true one despite hard evidence.

 

In the case of "effective", this is a fundamental flaw. A theory has to explain the observation but nothing else. "Everything happens as if" is still science, and the following "but" is no more science. Faith is about unobserved things, science is only about the observed ones. In that sense, "effective" is superfluous because science has to ignore what has no effect.

[studiot]

Strong opinions.

 

I think I'll just rest on my Zimmer Frame for now.

 

You were obviously too tired to bother to look it up whilst you were resting on yours.

 

For the benefit of those, less rude, who might also like to know.

 

Charge carriers respond differently to force fields when in solids than they do when in a vacuum.

The constant of proportionality between force and apparent aceleration is called effective mass.

 

For electrons this is still usually positive.

But for holes it can be positive or negative.

(and yes holes act as if they were massive objects)